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Start-ups design code, IP, tools semiconductor manufacturing space BY 2024at $200 million investment

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HYDERABAD: Union minister of state for electronics and information technology Rajeev Chandrasekhar announced a $200 million investment in start-ups that design code, IP, tools, or devices, claiming that by 2024 India would have entered the semiconductor manufacturing space and catalysed a larger, more domestic design and ecosystem.

While speaking at 'Very Large Scale Integration (VLSI) Design Conference' on the theme 'Semiconductors Driving Disruptive Innovations in Global Digitalisation’, he stated that the Centre would launch a production linked incentive (PLI) scheme for IT server and hardware manufacturing.

The VLSI event, which will be attended by over 2,000 delegates, saw several stakeholders speak on advancements in VLSI, embedded technologies, and opportunities for innovation.

We believe by 2024, India would have stepped into the semiconductor manufacturing space and catalysed a larger, more domestic design and ecosystem where we encourage start-ups to work with leading global majors to develop IP and devices, for which the government has announced the Future Design Program, through which $200 million will be invested in start-ups that design code, IP, tools, or devices for the next generation of applications in India,” he stated.

He stated that global trends such as increased demand for talent and redesigned supply chains were driving unprecedented growth for digital products and services, and that India's objectives as a semiconductor nation and electronic powerhouse were relevant and significant.

IT principal secretary Jayesh Ranjan said Telangana had created several opportunities for innovation and start-ups across the technology sector and VLSI field, with leading semiconductor companies having their base, and rapidly expanding in Hyderabad.

Dr Satya Gupta, president of the VLSI Society of India, remarked that it was necessary to look at addressing technological issues at higher levels of abstraction in CMOS-based design while also looking beyond Silicon for performance enhancement

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